This invention relates to translators for digital logic signals; and more particularly, it relates to signal translators which enable conventional CMOS logic gates and conventional BiCMOS logic gates to be interconnected and communicate with each other.
Conventional CMOS logic gates (NAND gates, NOR gates, etc.) operate between 0 and +5 volts. That is, the CMOS transistors which make up the logic gates are interconnected between a +5 volt power bus and a ground bus. Input signals and output signals for the CMOS logic gates have a high level of +5 volts and a low level of 0 volts.
By comparison, conventional bipolar logic gates operate between 0 and -5.2 volts. That is, the bipolar transistors which make up the logic gates are interconnected between a ground bus and a -5.2 volt power bus. Input signals and output signals for the bipolar logic gates have a high level of -0.8 volts and a low level of -1.6 volts.
Due to the differences in the power supply voltages and the input and output signal levels of the conventional CMOS logic gates and the conventional bipolar logic gates, those two types of logic gates cannot be connected directly to each other. To solve this problem in the prior art, the conventional CMOS logic gates have been modified by replacing the ground bus with a -5.2 volt power bus and replacing the +5 volt bus with a ground bus. With this change, the high voltage level from the modified CMOS logic gate becomes 0 volts and the low logic level becomes -5.2 volts. Then, to enable such modified CMOS logic gates to be interconnected to the conventional bipolar logic gates, signal translators have been developed which convert the 0 and -5.2 volt modified CMOS logic signals to the -0.8 volt and -1.6 volt bipolar logic signals. Circuits which include these modified CMOS logic gates, signal translators, and bipolar logic gates are called conventional BiCMOS logic circuits.
Despite the development of the above described BiCMOS logic circuits, conventional CMOS logic gates that operate between 0 and +5 volts are still used in many logic systems. And, to interconnect those conventional CMOS logic gates to the modified CMOS logic gates in BiCMOS circuits would require another type of translator which translates +5 and 0 volt signals to 0 and -5 volt signals (and vice versa). This type of translator has not been provided in the prior art.
Such a translator would have to operate between +5 volts and -5 volts. This is because the input signals go up to +5 volts and the output signals go down to -5 volts (or vice-versa). Consequently, the transistors in the translator would be exposed to a voltage difference of 10 volts; and, that in turn presents the question of how to design the translator such that its transistors do not break down.
Clearly, if the transistors in the translator are made with a high breakdown voltage which exceeds 10 volts, then breakdown will be avoided. However, the transistors which make up the conventional CMOS logic gates and the modified CMOS logic gates normally have a breakdown voltage which exceeds their 5 volt signal swing by only a small margin (e.g. a couple of volts). This small breakdown voltage margin is desired because raising the breakdown voltage of a transistor inherently decreases the speed at which the transistor switches.
Breakdown voltage in a transistor can, for example, be increased by increasing the doping concentration of the transistor's source and drain regions. But that inherently increases the source and drain capacitance, which reduces switching speed. Also, if only the transistors in the signal translator are made with a breakdown voltage which exceeds 10 volts, then special steps would have to be added to the fabrication process that is used to make all the other transistors in the conventional CMOS logic gates and modified CMOS logic gates. But, that in turn would increase the cost of the translator.
Accordingly, a primary object of the invention is to provide a signal translator which converts conventional CMOS signal levels of +5 and 0 volts to modified CMOS signal levels of 0 and -5 volts, and which is constructed of transistors whose breakdown voltage is only a couple of volts larger than 5 volts.